
2002 Microchip Technology Inc.
Preliminary
DS30453D-page 31
PIC16C5X
6.5
Program Counter
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next pro-
gram instruction to be executed. The PC value is
increased by one, every instruction cycle, unless an
instruction changes the PC.
For a GOTO instruction, bits 8:0 of the PC are provided
by the GOTO instruction word. The PC Latch (PCL) is
For
the
PIC16C56,
PIC16CR56,
PIC16C57,
PIC16CR57, PIC16C58 and PIC16CR58, a page num-
ber must be supplied as well. Bit5 and bit6 of the STA-
TUS Register provide page information to bit9 and
For a CALL instruction, or any instruction where the
PCL is the destination, bits 7:0 of the PC again are pro-
vided by the instruction word. However, PC<8> does
not come from the instruction word, but is always
Instructions where the PCL is the destination, or modify
PCL instructions, include MOVWF PCL, ADDWF PCL,
and BSF PCL,5.
For
the
PIC16C56,
PIC16CR56,
PIC16C57,
PIC16CR57, PIC16C58 and PIC16CR58, a page num-
ber again must be supplied. Bit5 and bit6 of the STA-
TUS Register provide page information to bit9 and
FIGURE 6-7:
LOADING OF PC
BRANCH INSTRUCTIONS
- PIC16C54, PIC16CR54,
PIC16C55
FIGURE 6-8:
LOADING OF PC
BRANCH INSTRUCTIONS
- PIC16C56/PIC16CR56
FIGURE 6-9:
LOADING OF PC
BRANCH INSTRUCTIONS
- PIC16C57/PIC16CR57,
AND PIC16C58/
PIC16CR58
Note:
Because PC<8> is cleared in the CALL
instruction, or any modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any pro-
gram memory page (512 words long).
PC
87
0
PCL
PC
87
0
PCL
Reset to ’0’
Instruction Word
GOTO Instruction
CALL or Modify PCL Instruction
PA<1:0>
2
STATUS
PC
87
0
PCL
9
10
PA<1:0>
2
STATUS
PC
87
0
PCL
9
10
Instruction Word
Reset to ‘0’
Instruction Word
70
GOTO Instruction
CALL or Modify PCL Instruction
0
PA<1:0>
2
STATUS
PC
87
0
PCL
9
10
PA<1:0>
2
STATUS
PC
87
0
PCL
9
10
Instruction Word
Reset to ‘0’
Instruction Word
70
GOTO Instruction
CALL or Modify PCL Instruction